1. Field of the Invention
This invention relates to packages for power electronic devices, and in particular, to a multi-lead package for power semiconductor devices. The package can be hermetically sealed and has a footprint to allow high packing density, yet is compatible with conventional mounting holes for power semiconductor device packages.
2. Description of the Prior Art
To date, packaging of power semiconductor devices has typically employed packages such as the TO-204, also known as the TO-3. This hermetic package has established an industry standard spacing for mounting holes for affixing the package to a printed circuit board or other substrate. FIGS. 3a and 3b illustrate this prior art package.
Although this package has been widely used for packaging power devices for many years, it has several features which limit its performance. As shown, the leads 10 are brought out through the base 12 of the package. This considerably limits the size of the die or dice that may be attached to the base of the package, because any such die or dice must be affixed in the space between the openings 15 through which the leads pass and between the mounting holes 18. Furthermore, because holes 15 must be provided in the mounting surface, the power dissipation of the package is restricted because the surface area of the bottom of the package is reduced to allow room to contact the leads 10.
An additional disadvantage of the TO-204 package is that additional holes must be drilled in the mounting surface to attach the package to enable the leads 10 to protrude through the mounting surface. Furthermore, the package cavity 20 is cylindrical, while most die are rectangular, thereby wasting space. The nonrectangular shape of the package base does not allow efficient placement of many packages on the same mounting surface.